167 lines
5.8 KiB
C
167 lines
5.8 KiB
C
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/*
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* Copyright (c) 2014-2016 IBM Corporation.
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions are met:
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* * Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* * Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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* * Neither the name of the <organization> nor the
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* names of its contributors may be used to endorse or promote products
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* derived from this software without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
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* WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
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* DISCLAIMED. IN NO EVENT SHALL <COPYRIGHT HOLDER> BE LIABLE FOR ANY
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* DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
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* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
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* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
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* ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
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* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*/
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#include "oslmic.h"
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#include "stm32l1xx.h"
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//////////////////////////////////////////////////////////////////////
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// GPIO
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//////////////////////////////////////////////////////////////////////
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// GPIO by port number (A=0, B=1, ..)
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#define GPIOx(no) ((GPIO_TypeDef*) (GPIOA_BASE + (no)*(GPIOB_BASE-GPIOA_BASE)))
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// GPIOCFG macros
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#define GPIOCFG_AF_MASK 0x000F
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#define GPIO_AF_I2C1 0x04
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#define GPIOCFG_MODE_SHIFT 4
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#define GPIOCFG_MODE_MASK (3<<GPIOCFG_MODE_SHIFT)
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#define GPIOCFG_MODE_INP (0<<GPIOCFG_MODE_SHIFT)
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#define GPIOCFG_MODE_OUT (1<<GPIOCFG_MODE_SHIFT)
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#define GPIOCFG_MODE_ALT (2<<GPIOCFG_MODE_SHIFT)
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#define GPIOCFG_MODE_ANA (3<<GPIOCFG_MODE_SHIFT)
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#define GPIOCFG_OSPEED_SHIFT 6
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#define GPIOCFG_OSPEED_MASK (3<<GPIOCFG_OSPEED_SHIFT)
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#define GPIOCFG_OSPEED_400kHz (0<<GPIOCFG_OSPEED_SHIFT)
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#define GPIOCFG_OSPEED_2MHz (1<<GPIOCFG_OSPEED_SHIFT)
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#define GPIOCFG_OSPEED_10MHz (2<<GPIOCFG_OSPEED_SHIFT)
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#define GPIOCFG_OSPEED_40MHz (3<<GPIOCFG_OSPEED_SHIFT)
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#define GPIOCFG_OTYPE_SHIFT 8
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#define GPIOCFG_OTYPE_MASK (1<<GPIOCFG_OTYPE_SHIFT)
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#define GPIOCFG_OTYPE_PUPD (0<<GPIOCFG_OTYPE_SHIFT)
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#define GPIOCFG_OTYPE_OPEN (1<<GPIOCFG_OTYPE_SHIFT)
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#define GPIOCFG_PUPD_SHIFT 9
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#define GPIOCFG_PUPD_MASK (3<<GPIOCFG_PUPD_SHIFT)
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#define GPIOCFG_PUPD_NONE (0<<GPIOCFG_PUPD_SHIFT)
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#define GPIOCFG_PUPD_PUP (1<<GPIOCFG_PUPD_SHIFT)
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#define GPIOCFG_PUPD_PDN (2<<GPIOCFG_PUPD_SHIFT)
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#define GPIOCFG_PUPD_RFU (3<<GPIOCFG_PUPD_SHIFT)
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// IRQ triggers (same values as in Moterunner!)
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#define GPIO_IRQ_MASK 0x38
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#define GPIO_IRQ_FALLING 0x20
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#define GPIO_IRQ_RISING 0x28
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#define GPIO_IRQ_CHANGE 0x30
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// configure operation mode of GPIO pin
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void hw_cfg_pin (GPIO_TypeDef* gpioport, u1_t pin, u2_t gpiocfg);
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// set state of GPIO output pin
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void hw_set_pin (GPIO_TypeDef* gpioport, u1_t pin, u1_t state);
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// configure given line as external interrupt source (EXTI handler)
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void hw_cfg_extirq (u1_t portidx, u1_t pin, u1_t irqcfg);
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//////////////////////////////////////////////////////////////////////
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// EEPROM
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//////////////////////////////////////////////////////////////////////
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// Unique device ID registers (96 bits)
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#define UNIQUE_ID_BASE 0x1FF80050
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#define UNIQUE_ID0 (UNIQUE_ID_BASE+0x00)
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#define UNIQUE_ID1 (UNIQUE_ID_BASE+0x04)
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#define UNIQUE_ID2 (UNIQUE_ID_BASE+0x14)
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// EEPROM 0x08080000-0x08080FFF 4096 bytes
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#define EEPROM_BASE 0x08080000
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// write 32-bit word to EEPROM
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void eeprom_write (u4_t* addr, u4_t val);
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// copy bytes to EEPROM (aligned, multiple of 4)
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void eeprom_copy (void* dst, const void* src, u2_t len);
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//////////////////////////////////////////////////////////////////////
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// ADC
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//////////////////////////////////////////////////////////////////////
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u2_t adc_read (u1_t chnl);
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//////////////////////////////////////////////////////////////////////
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// CRC engine (32bit aligned words only!)
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//////////////////////////////////////////////////////////////////////
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void crc32_init (void);
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unsigned int crc32 (void* ptr, int nwords);
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void crc32_shutdown (void);
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//////////////////////////////////////////////////////////////////////
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// I2C
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//////////////////////////////////////////////////////////////////////
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// initialize i2c-bus
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u1_t i2c_init (void);
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// transfer data to and from i2c-device
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s1_t i2c_xfer (u1_t addr, u1_t* data, u1_t wlen, u1_t rlen);
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//////////////////////////////////////////////////////////////////////
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// SPI
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//////////////////////////////////////////////////////////////////////
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#define SPI_MODE_CPHA 0x01
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#define SPI_MODE_CPOL 0x02
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// initialize SPI (modes 0-3, bit0=clock phase, bit1=clock polarity)
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void spi_init (u1_t mode);
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// transfer byte to and from SPI (no chip-select)
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u1_t spi_xfer (u1_t out);
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//////////////////////////////////////////////////////////////////////
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// FLASH
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//////////////////////////////////////////////////////////////////////
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#ifdef CFG_flash
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typedef u2_t const * pref2u2_t;
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typedef u1_t const * pref2u1_t;
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typedef pref2u1_t pref_t;
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pref2u1_t hw_flash_init();
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void hal_erase_p (pref2u1_t ppdst, u2_t len, u1_t itemsize);
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void hal_copy_x2p (pref2u1_t ppdst, u2_t len, xref2u1_t xpsrc);
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void hal_wrp_u1 (pref2u1_t ppdst, u1_t value);
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void hal_wrp_u2 (pref2u2_t ppdst, u2_t value);
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#endif /* CFG_flash */
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